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NXP Semiconductors /MIMXRT1021 /USB /HCCPARAMS

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Interpret as HCCPARAMS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADC)ADC 0 (PFL)PFL 0 (ASP)ASP 0IST0EECP

Description

Host Controller Capability Parameters

Fields

ADC

64-bit Addressing Capability This bit is set ‘0b’ in all controller core, no 64-bit addressing capability is supported
PFL

Programmable Frame List Flag If this bit is set to zero, then the system software must use a frame list length of 1024 elements with this host controller
ASP

Asynchronous Schedule Park Capability If this bit is set to a one, then the host controller supports the park feature for high-speed queue heads in the Asynchronous Schedule
IST

Isochronous Scheduling Threshold
EECP

EHCI Extended Capabilities Pointer

Links

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Register License

Copyright 2016-2020 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data